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Here is a design for a barrel shifter using two states: first
a set of 74LS153 dual 4-1 multiplexers, followed by a set of
74LS151 single 8-1 multiplexers. This operates on 32 bits and
can shift by any number of bits in just these two stages
of logic. Only 32 bits are considered, cause this barrel shifter
is meant to be used in the floating point unit to
normalise the fractional part.
Later I start to work out what is involved in floating point
addition. A few worked examples are required...
